This talk is about the exploitation of carbon nanotubes (CNTs) and ferroelectrics towards the next generation of microelectronics vertical memory architecture.
With the drive created by the Internet of EveryThing there is a great pressure over the microelectronics industry towards small, mobile, fast, functional and flexible electronics. These combined requirements demand alternative solutions in terms of circuitry design and materials design and performance. Indeed the semiconductor industry is facing major challenges ?beyond 2020 as planar 2D scaling is reaching its limits. Heterogeneous integration, low power logic and vertical architectures (3D), are key elements for the new microelectronics era of 3D Power Scaling.?
With this background and based on the promising performance of CNTs in microelectronics, the combination of CNTs, as vertical bottom electrodes and ferroelectric (FE) coatings may be a way to the next generation of 3D vertical ferroelectric memories based on a tridimensional arrangement of unidimensional structures. However manufacturing these structures may be a challenge. Combining low temperature stable CNTs and high crystallization temperature FE oxides is the very first difficulty.
Our systematic study on the fabrication of multiwall CNTs (MWCNTs) - FE structures using low cost low temperature methods is presented. Lead zirconate titanate (Pb1-xZrxTiO3, PZT), barium titanate (BaTiO3, BT) and bismuth ferrite (BiFeO3, BFO) are the FE oxides under study. Critical aspects as the thermal stability of CNTs, FE phase formation in the presence of CNTs and interfaces between the CNTs/FE are discussed. Piezoresponse Force Microscopy (PFM) was used to assess the ferroelectric response of these structures.
From the materials point of view our work clearly demonstrates that CNTs / FE oxides may support vertical architecture for the next generation of ferroelectric memories.
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